Laser annealing using a scanned laser beam offers an ultra-low thermal budget, a high dopant activation and super-abrupt junctions that are ideal for advanced semiconductor device fabrication. Consequently, most logic devices with minimum feature sizes below 45 nm, and many memory devices below 32 nm, now use some form of laser processing for one of several manufacturing steps, including source-drain activation, metal-silicon alloy formation, defect annealing, and the like.
One form of laser annealing uses pulsed lasers. Examples of pulsed laser annealing are described in WO 2001/071787 A1, U.S. Pat. No. 6,365,476 and U.S. Pat. No. 6,366,308. Typical semiconductor applications require an annealing time of 0.1 milliseconds to 10 milliseconds (ms). Since optical pulses from a pulsed laser have a much shorter time duration (e.g., nanoseconds to microseconds) than the required annealing time, many optical pulses are required for a given exposure. This leads to problems in annealing uniformity because of pulse-to-pulse power variations.